000 00520nam a2200205Ia 4500
008 210529s9999||||xx |||||||||||||| ||und||
040 _aSOETPKD
041 _aEnglish
082 _a621.384.6
100 _aUYEMURA, J. P.
245 _aCHIP DESIGN FOR SUBMICRON VLSI
_bCMOS LAYOUT AND SIMULATION
250 _a1ST
260 _bCENGAGE LEARNING
_aNEW DELHI
_c2009
300 _aNA
_bNA
500 _aCR-2261
650 _aNA
650 _aNA
942 _cBK
999 _c39281
_d39281